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CAT4008
Table 4. TIMING CHARACTERISTICS
(For 3.0 V ≤ V DD ≤ 5.5 V, T AMB = 25 ° C, unless specified otherwise.)
Min
Typ
Max
Symbol
Name
Conditions
(Note 1)
(Note 2)
(Note 1)
Units
CLK
f clk
t cwh
t cwl
CLK Clock Frequency
CLK Pulse Width High
CLK Pulse Width Low
20
20
25
MHz
ns
ns
SIN
t ssu
t sh
Setup time SIN to CLK
Hold time SIN to CLK
4
4
ns
ns
LATCH
t lwh
T lh
LATCH Pulse width
Hold time LATCH to CLK
20
4
ns
ns
T lsu
Setup time LATCH to CLK
Channel Stagger Delay
400
ns
LEDn
t ld
t ls
t lst
t bd
t lr
t lf
LED1 Propagation delay
LED Propagation delay stagger
LED Propagation delay stagger total
BLANK Propagation delay
LED rise time (10% to 90%)
LED fall time (90% to 10%)
LATCH to LED1 off/on
LED(n) to LED(n+1)
LED1 to LED8
BLANK to LED(n) off/on
Pull ? up resistor = 50 W to 3.0 V
Pull ? up resistor = 50 W to 3.0 V
40
17
120
60
40
30
300
40
300
200
250
ns
ns
ns
ns
ns
ns
SOUT
t or
t of
SOUT rise time (10% to 90%)
SOUT fall time (90% to 10%)
C L = 15 pF
C L = 15 pF
5
5
ns
ns
t od
Propagation delay time SOUT
CLK to SOUT
8
15
25
ns
1. All min and max values are guaranteed by design.
2. V DD = 5 V, LED current 30 mA.
VDD
1 m F
VDD
LED1
Rp
50 W
BLANK
LATCH
SIN
CLK
RSET
CAT4008
GND
LED8
SOUT
Rp
Cl
50 W
V1
3V
15 pF
RSET
Figure 2. Test Circuit for AC Characteristics
http://onsemi.com
4
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